Patents
Eby G. Friedman
United States Patents
- M. Popovich, E. G. Friedman, R. M. Secareanu, and O. L. Hartin, "
Method and Apparatus to Reduce Noise Fluctuation in On-Chip Power
Distribution Networks," United States Patent, No. 7,595,679 B1,
September 29, 2009.
- V. Kursun and E. G. Friedman, "
Domino Logic with Variable Threshold Voltage Keeper," United
States Patent, No. 7,388,399 B1, June 17, 2008.
- V. Kursun and E. G. Friedman, "
Domino Logic with Variable Threshold Voltage Keeper," United States
Patent, No. 7,218,151 B1, May 15, 2007.
- J. Rosenfeld, M. Kozak, and E. G. Friedman, "
High-Gain, Bulk-driven Operational Amplifiers for System-on-chip
Applications," United States Patent, No. 7,088,178 B1,
August 8, 2006.
- V. Kursun and E. G. Friedman, "
Dual Threshold Voltage and Low Swing Domino Logic Circuits,"
United States Patent, No. 6,900,666, May 31, 2005.
- Y. Ismail and E. G. Friedman, "
Model for Simulating Tree
Structured VLSI Interconnect," United States Patent, No. 6,460,165,
October 1, 2002.
- E. Friedman and R. M. Secareanu, "
Digital CMOS Voltage Interface Circuits," United States Patent, No.
6,366,127, April 2, 2002.
- E. Friedman and R. M. Secareanu, "
Current Mirror and/or Divider Circuits with Dynamic Current Control
which are Useful in Applications for Providing Series or Reference
Currents, Subtraction, Summation and Comparison," United States
Patent, No. 6,166,590, December 26, 2000.
- E. Friedman and R. M. Secareanu, "
Digital Buffer Circuits,"
United Sates Patent, No. 6,163,174, December 19, 2000.