Patents

Eby G. Friedman

Distinguished Professor of Electrical and Computer Engineering
Department of Electrical and Computer Engineering
University of Rochester
Rochester, New York 14627
USA


United States Patents
  1. I. Vaisband and E. G. Friedman, " "Heterogeneous Method for Energy Efficient Distribution of On-Chip Power Supplies and Power Network On-Chip System for Scalable Power Delivery," United States Patent, No. 9,785,161, October 10, 2017.

  2. A. Kolodny, S. Kvatinsky, R. Patel, and E. Friedman," Multistate Register having a Flip Flop and Multiple Memristive Devices," United States Patent, No. 9,659,650, May 23, 2017.

  3. S. Kose and E. G. Friedman, " Digitally Controlled Wide Range Pulse Width Modulator," United States Patent, No. 9,007,140, April 14, 2015. For licensing.

  4. A. Morgenshtein, R. Ginosar, A. Kolodny, and E. G. Friedman, " Logic Circuit Delay Optimization," United States Patent, No. 8,225,265, July 17, 2012.

  5. E. G. Friedman and G. Chen, " Transient Response of a Distributed RLC Interconnect based on Direct Pole Extraction," United States Patent, No. 7,818,149 B2, October 19, 2010.

  6. M. Popovich and E. G. Friedman, " Method for Effective Placement of On-Chip Decoupling Capacitors Determined by Maximum Effective Radii," United States Patent, No. 7,802,220 B1, September 21, 2010.

  7. M. Popovich, E. G. Friedman, R. M. Secareanu, and O. L. Hartin, " Method and Apparatus to Reduce Noise Fluctuation in On-Chip Power Distribution Networks," United States Patent, No. 7,595,679 B1, September 29, 2009.

  8. V. Kursun and E. G. Friedman, " Domino Logic with Variable Threshold Voltage Keeper," United States Patent, No. 7,388,399 B1, June 17, 2008.

  9. V. Kursun and E. G. Friedman, " Domino Logic with Variable Threshold Voltage Keeper," United States Patent, No. 7,218,151 B1, May 15, 2007.

  10. J. Rosenfeld, M. Kozak, and E. G. Friedman, " High-Gain, Bulk-driven Operational Amplifiers for System-on-chip Applications," United States Patent, No. 7,088,178 B1, August 8, 2006.

  11. V. Kursun and E. G. Friedman, " Dual Threshold Voltage and Low Swing Domino Logic Circuits," United States Patent, No. 6,900,666, May 31, 2005.

  12. Y. Ismail and E. G. Friedman, " Model for Simulating Tree Structured VLSI Interconnect," United States Patent, No. 6,460,165, October 1, 2002.

  13. E. Friedman and R. M. Secareanu, " Digital CMOS Voltage Interface Circuits," United States Patent, No. 6,366,127, April 2, 2002.

  14. E. Friedman and R. M. Secareanu, " Current Mirror and/or Divider Circuits with Dynamic Current Control which are Useful in Applications for Providing Series or Reference Currents, Subtraction, Summation and Comparison," United States Patent, No. 6,166,590, December 26, 2000.

  15. E. Friedman and R. M. Secareanu, " Digital Buffer Circuits," United Sates Patent, No. 6,163,174, December 19, 2000.